1. Field of the Invention
The present invention relates to a data processing apparatus and method for controlling access to registers of the data processing apparatus.
2. Description of the Prior Art
A known data processing apparatus includes a processing unit for performing data processing operations on data values, with that processing unit having a plurality of modes of operation. Registers are provided for storing data values for access by the processing unit when performing the data processing operations. A subset of those registers may be arranged to be mode specific registers which are for use by the processing unit when operating in an associated mode of operation.
It is also known for such a processing unit to be switchable between a plurality of contexts. For example, to seek to alleviate the reliance on operating system security, it is known to provide a system in which the data processing apparatus is provided with separate domains, these domains providing a mechanism for handling security at the hardware level. Such a system is described for example in commonly assigned co-pending U.S. patent application Ser. No. 10/714,561, now U.S. Pat. No. 7,305,534, the contents of which are herein incorporated by reference, this application describing a system having a secure domain and a non-secure domain. In that system, the non-secure and secure domains in effect establish separate worlds, the secure domain providing a trusted execution space separated by hardware enforced boundaries from other execution spaces, and likewise the non-secure domain providing a non-trusted execution space. Within such a system, a different context may be associated with each domain.
Whilst such systems have been designed with security in mind, it should be noted that security issues are not the only reason for using a data processing apparatus having such domains, and indeed the different domains provided by the data processing apparatus may be used primarily for other purposes. For example, robustness and reliability may be improved through use of such domains. Even if the data in a first domain is not sensitive in the security sense, it may be data which desirably should be protected from being overwritten by bugs in the rest of the platform, for example because such overwriting may cause some critical operation not to happen. By having the hardware split resulting from the use of multiple domains, the software in that first domain should remain intact even if the software executing in another domain operates incorrectly due to a bug.
As another example of a system in which the processing unit may be switchable between a plurality of contexts, the processing unit may implement multiple virtual machines, and each of the contexts may be associated with a different virtual machine. Each virtual machine will typically have an operating system running one or more applications, and a hypervisor layer is provided for switching the operation of the processing unit between different virtual machines.
In a data processing apparatus where the processing unit is switchable between a plurality of contexts, the data values stored in the plurality of registers will typically be dependent on a current context of the processing unit. Accordingly, when the processing unit performs a switch operation to switch from a current context to a new context, it is typically required for the data values in the plurality of registers to be updated having regard to the new context. To achieve this, the data values in the registers are typically written to a buffer provided in the memory system and then the data values associated with the new context are read from another buffer in the memory system into the registers. It has been found that this process takes a significant amount of time, and in particular contributes significantly to the overall amount of time taken to switch between contexts.
Accordingly, it would be desirable to provide an improved technique for reducing the time taken to switch contexts.
In a data processing apparatus having a main processor core used to perform integer operations, and a separate coprocessor provided for performing floating point operations, there will typically be a number of integer registers provided within the processor core and a number of floating point registers provided in the coprocessor. Because not all processes will require the capability to handle floating point operations, not all of those processes require use of the coprocessor registers, and accordingly it is known to selectively disable the coprocessor when a process is being run which does not require floating point computations, hence in effect preventing use of the floating point registers. If a switch of context were to occur whilst the, coprocessor is not enabled, it is then not necessary to save the data values in the floating point registers of the coprocessor out to a buffer in the memory system, nor to load new data values into those floating point registers, and accordingly in situations where the coprocessor is not enabled the context switch can proceed more rapidly than would otherwise be the case.
However, whilst such an approach leads to a quicker context switch operation in this specific scenario, it does not assist in speeding up the operation of changing context in the more general case, for example where the coprocessor is enabled, or where there is no coprocessor. In any event, all of the registers in the processor core still need to have their data values updated to reflect the new context, and hence there is still a significant overhead involved in changing context.